phase-locked loop
英 [feɪz lɒkt luːp]
美 [feɪz lɑːkt luːp]
网络 锁相环; 锁相回路; 相位锁定环; 锁相环电路; 锁相环路
双语例句
- An adaptive Phase-Locked Loop ( PLL) with a fast settling time and its key blocks including Phase-Frequency Detector ( PFD) and charge pump are then proposed and analyzed.
提出并分析了一种自适应的具有快速建立时间的锁相环结构及其关键模块（鉴相鉴频器和电荷泵）。 - The software phase-locked loop ( SPLL) technology in the steady speed control of permanent magnet brushless DC motor ( BLDCM) in gyro was discussed.
研究了软件锁相环技术在陀螺用无位置传感器无刷直流电机稳速控制系统中的应用。 - A fast all digital phase-locked loop with automatic modulus control is presented.
提出了一种具有自动变模控制的快速全数字锁相环。 - Signal demodulation of automatic block with audio frequency shift modulated track circuits was implemented with phase-locked loop ( PLL) technique and a singe chip microcomputer.
利用锁相环（LL）窄带跟踪特性，与单片机结合，实现自动闭塞系统移频信号解调。 - The simulation results meet the design requirements; this method is also suitable for the design and analysis of higher order charge-pump phase-locked loop.
仿真结果符合设计要求，这种方法同样适合高阶电荷泵锁相环的设计和分析。 - Research of frequency synthesizer based on phase-locked loop technology
基于锁相环技术的频率合成器的研究 - Design of CMOS Integrated Phase-Locked Loop Frequency Synthesizer; A PLL Frequency Synthesizer with High Multiple-Frequency
CMOS集成锁相式频率合成器设计一种多倍频选择的高倍频锁相环频率合成器 - This article presents a new design structure of variable bandwidth phase-locked loop based on improving phase-locked loop of actively mode-locked fiber laser.
对主动锁模光纤激光器的锁相环进行改进，提出一种新型的“变带宽锁相环”的设计结构。 - Frequency Tracking Technology of Ultrasonic Motor Based on Phase-Locked Loop
基于锁相环的超声波电机频率跟踪控制技术 - A Novel All-digital Phase-locked Loop Z-domain Model in Time Domain
一种新型的时间域全数字锁相环Z域模型 - Single-phase Phase-Locked Loop based on Modified Instantaneous Reactive Power Theory
基于改进瞬时无功理论的单相锁相环 - FPGA-based high-performance all-digital phase-locked loop design
基于FPGA的高性能全数字锁相环设计与实现 - The nonideal factor of the phase-frequency detector and charge pump in phase-locked loop and its overcome method is proposed.
本文讨论了锁相环中鉴相器和电荷泵中非理想因素及其克服方法。 - Above algorithm is realized using single FPGA, frequency-locked loop and phase-locked loop are implemented by NiosII replacing conventional DSP, and these enhance stability and reliability of system.
本文介绍一种高性能快速跳频合成信号发生器，利用锁相环路和锁频环路相结合的原理和跳频校准控制技术而实现的。 - Radio communication systems based on the application of phase-locked loop analysis
基于无线电通信系统的锁相环应用分析 - In this paper, phase noise phase-locked loop circuits are discussed, and in which the phase noise components also make a more detailed analysis.
本文对锁相环电路的相位噪声进行了论述，并对其中各组成部件的相位噪声也做了较为详细的分析。 - A Design of Phase-Locked Loop Based on ADS
基于ADS仿真的锁相环设计与实现 - Optimized implementation scheme of three phase phase-locked loop based on FPGA
基于FPGA的三相锁相环的优化设计方案 - A Digital Steady-speed Drive System with Phase-locked Loop for Brushless DC Motor
一种无刷直流电动机锁相数字稳速驱动系统 - The Implementation and Analysis of Digital Phase-locked Loop Based on FPGA
基于FPGA的数字锁相环实现与性能分析 - Improvement and Application of Digital Costas Phase-locked Loop
数字Costas锁相环的改进及应用 - Analysis of the Magnitude Frequency Responses of Software Phase-Locked Loop and Its Loop Filter
软件锁相环环路滤波器和闭环幅频响应分析 - Realization and Speed Control Algorithm of DC Motor Based on Phase-locked Loop Technology
基于软件锁相环直流电机转速控制算法的研究及实现 - Based on the reduction of active current separate method, a method without phase-locked loop for detection is presented.
该文对该检测方法进行简化，提出了一种无锁相环的单相电路谐波和无功电流检测方法。 - This paper makes a study of the channel co-sharing technique using the Cross-Coupled Phase-Locked Loop ( CCPLL).
本文研究了利用交叉耦合锁相环实现信道共享的问题。 - Design and Realization of Software Phase-Locked Loop under Grid Voltage Dissymmetry
电压不对称情形下基于DSP软件锁相环的设计 - The simulation results prove that the three-phase phase-locked loop can work well in disturbance situation and variable frequency system when the frequency of the inputs is variable.
并对相位突变和频率突变的情况进行了仿真研究，说明在相位和频率发生变动时三相锁相环仍能有效地锁定相位，能够满足系统变频的要求。 - Article concludes with a phase-locked loop phase noise improvement approach.
文中最后提出了改善锁相环相位噪声的办法。 - A high-order phase-locked loop ( PLL) for radio frequency synchronization is designed.
文章介绍一种用于射频同步的高阶环设计方法。 - The phase-locked loop by the discriminator, the ring circuit filter and the pressure controls the oscillator to be composed.
锁相环由鉴相器、环路滤波器和压控振荡器组成。